Energies 2020 , 13, x doi: FOR PEER REVIEW www.mdpi.comjournal energies [621722]

Energies 2020 , 13, x; doi: FOR PEER REVIEW www.mdpi.com/journal/ energies
Article 1
Carrier -Phase -Shifted Rotation Pulse-Width – 2
Modulation Scheme for Dynamic Active Power 3
Balance of Modules in Cascaded H -Bridge 4
STATCOM s 5
Chen Xu 1, Jingjing Chen 2 and Ke Dai 1,* 6
1 State Key Laboratory of Advanced Electromagnetic Engineering and Technology, School of Electrical 7
and Electronic Engineering, Huazhong University of Science and Technology, Wuhan 430074, China; 8
[anonimizat] 9
2 State Grid Jingzhou City Jingzhou Distric t Power Supply Company, Jingzhou 434100, China; 10
[anonimizat] 11
* Correspondence: [anonimizat] ; Tel.: + 86-(0)27 -87543071 12
Received: date; Accepted: date; Published: date 13
Abstract: In the medium -voltage power distribution system, c ascaded H-bridge (CHB) static 14
synchronous compensator s (STATCOM s) are widely u tilized to solve the power quality issues by 15
injecting the controlled reactive current into the system. The c arrier -phase -shifted (CPS) pulse – 16
width -modulation (PWM) scheme is preferred for CHB -STATCOM s, because it can minimize the 17
compensating current dist ortion and realize the relative active power balance among the H -bridge 18
modules. This paper reveal s the i nfluence of the carrier phase difference on the module active power 19
balance , and pro poses a carrier rotation technique with CPS-PWM scheme to address this drawback. 20
The rotation rules are analyzed, especially the rotation time is designed to enhance the robustness 21
of the system . With th e proposed method, the natural dynamic active power balance of each module 22
can be achieved , and the capacitor voltage can maintain balance without the individual capacitor 23
voltage control or the auxiliary circuits in theory . The e xperimental results acquired from a 24
downscaled CHB STATCOM protot ype demonstrate the feasibility of the proposed CPS rotation 25
PWM scheme . 26
Keywords: cascaded H -bridge ; static synchronous compensator ; carrier -phase -shifted ; carrier 27
rotation ; active power balance; multilevel converter 28
29
1. Introduction 30
With the increasing of various renewable energy sources and power electronic device s 31
connected into the microgrid or power distribution systems, the power quality problems, such as 32
voltage fluctuation at the point of common coupling (PCC) , harmonic pollution , uncontrolled 33
reactive power , and poor power factor become more serious [1], [2]. 34
Fixed capacitor bank in parallel to the power system is an old technology to manage the system 35
reactive power [ 3]. However, i ts compensation range is discontinuous and the dynamic respond is 36
very low. With the development of semiconductor technologies, the thyristor -controlled static var 37
compensators (SVC) appeared in the late 1970s [4]. Then, t he flexible ac transmission system (FACTS) 38
equipment based on the fully controlled devices, e.g. insulated gate bipolar transistor (IGBT), began 39
to take the place of the thyristor -controlled SVC benefiting from larger compensation range, higher 40
switching frequency, lower harmonic injection , and faster dynami c response [ 5]. Static synchronous 41
compensator s (STATCOM s) are the major FACTS equipment . It is controlled as a voltage source and 42

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injects capacitive or inductive reactive current into the system, which is helpful for PCC voltage 43
regulation, power factor c orrection, transient stability improvement and system oscillation 44
suppression [ 6]-[8]. 45
In order to accommodate to the high voltage and large capacity requirements in modern power 46
distribution or transmission system, multi -pulse and multilevel circuit bec ame the major choices for 47
STATCOM [ 9]-[16]. The multi -pulse STATCOM utilizes a zigzag transformer connected to the utility 48
line. There are obvious disadvantages such as high cost, large volume and high power losses. 49
Moreover, the transformer saturation effec t may create difficulties for designing the control system 50
[9]. As for multilevel STATCOM s, the device or module cascaded topology replace s the function of 51
the transformer , and the above side-effects are greatly avoided . A three -level diode -clamped 52
multile vel converter was introduced in [ 10] and it has been expanded to more than four -level since 53
its appearance [ 11]. But the number of clamping diode s and the severe problems with dc-link voltage 54
control restrict the further expansion of the voltage levels. A flying capacit or-clamped multilevel 55
converter was first proposed as a chopper in [ 12]. For this topology, the clamping capacitors voltages 56
are automatically balanced when an adequate modulation scheme is implemented. However, when 57
the switching f requency is low, the capacit ances become large for maintaining the voltage s within 58
the switching period [13]. A cascaded H-bridge (CHB) converter with star connection first appeared 59
in [1 4], which omits the clamping components . Its delta -connection configu ration was presented in 60
[15], and the three -phase independent control enhances the system reliability. Due to the high 61
efficiency, excellent output current characteristics, high modularity and scalability, CHB has become 62
the most preferred choice for the S TATCOM project installation until now [16]. 63
In a single phase of a CHB STATCOM, the ac -sides of the H -bridge modules are connected in 64
series , and the cascaded phase voltage are synthesized by the ac-side output voltage of each module . 65
So it is important to maintain the dc -side capacitor voltage balance of the modules for its safe 66
operation . The multi -carrier pulse -width -modulation (PWM) modulation methods, e. g. carrier – 67
phase -shifted (CPS) and carrier -phase -disposition (CPD) , are common ly recommended for CHB 68
STATCOM s [17], [18] . With an appropriate carrier allocation for each SM, some switching harmonics 69
can be canceled out in the cascaded voltage, and the equivalent switching frequency increases, which 70
will contribut e to the voltage and current waveforms with good quality . Considering the consistence 71
of each module, the CPS method is more preferred , where the switching frequenc ies for the modules 72
are identical. It realizes the relative active power balance among the modules neglecting the carrier 73
phase differences [19]. Usually, the fundamental component in the ac -side voltage of the module is 74
regarded as the same with the voltage reference in the PWM process [20]. Actually, the carrier phase 75
will also affect the fundamental component, especially when the carrier frequency is relatively low. 76
Thus, if the minor carrier phase difference s among the modules are taken into consideration, the 77
active power of the module s will be slightly different and the capacitor voltages will diverge from 78
the rated value without any limita tion. 79
There are two main technical route s to overcome the different active power of the modules and 80
maintain the capacitor voltage balanc e for CHB -STATCOMs. On the one hand, [21] and [22] 81
introduced the external balance circuits to realize t he active power exchange s among different 82
modules . Nevertheless , they increase d the cost and complexity of the systems. On the other hand, 83
some additional close -loop active power control strategies were proposed for an individual module 84
[23]-[25]. These methods changed the voltage reference to achieve the balance, but increased the 85
complexity of the control system. None of the above methods solve the problem of active power 86
imbalance caused by the carrier difference in the modulation process and realize the complete natural 87
active power balance for the modules . 88
In this paper, the i nfluence of the carrier phase difference on the module active power balance 89
is revealed , and a CPS rotation (CPSR) PWM scheme is proposed to overcome this drawback. The 90
rotation time is designed to enhance the robustness of the system and its realization is illustrated. 91
With the proposed method, the natural dynamic active power balance for the module s can be 92
realiz ed. 93

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The outline of the remaining part is organized as follows. Section II introduce s the basic control 94
method for CHB -STAT COMs . Section III describes the conventional CPS-PWM method and analy zes 95
the i nfluence of the carrier phase difference on the module active power balance . Section IV proposes 96
the CPSR scheme and explain the rotation rules to enhance the system robustness . Section V shows 97
the experiment al verification. Finally , Section V I concludes the whole paper. 98
2. Basic control method for CHB -STATCOM 99
A three -phase CHB -STATCOM with star configuration is illustrated in the left part of Figure 1. 100
One phase of the STATCOM comprises N CHB modules and a buffer inductor L in series . ix represents 101
the three -phase compensating reactive current of the STATCOM and vx represents the three -phase 102
grid voltage , where x = a, b, c . The positive direction of the compensat ing current is defined from the 103
grid to the converter. So, if it leads the grid voltage by 90 degrees, the converter works in the 104
capacitive mode and injects inductive reactive current to the grid. Contrarily, the converter works in 105
the inductive mode and injects capacitive reactive current to the grid with the compensating current 106
lagging the grid voltage by 90 degrees. 107
Its classical voltage and current dual -loop control is illustrated in the right part of Figure 1. The 108
external voltage loop ensur es the feedback average capacitor voltage UC_ave tracks the capacitor 109
voltage reference UC_ref. It can be regarded as the entire active power control for the converter . The 110
inner current loop based on the d -q coordinate s makes the compensation current trac ks the current 111
reference Iq_ref with zero error [26] , where ωt represents the phase -locked -loop message . The d -q 112
decoupling skill in the inner current loop can speed up the transient regulation of the controller [27]. 113
The grid voltage feedforward loop enha nces the system stability and avoid the interference of the 114
grid voltage s [28]. The final voltage reverence vx_ref is given to the m odules per phase to generate the 115
drive pulses through their PWM process es. 116
Ditto
DittoGrid
L
UC
UC
UCia
UC_aveUC_ref
PI
Parkix
PI
ωL
ωL
ωt
Iq_ref
PI
Inverse
Parkωt
vx_refva
vxExternal
voltage loop
Inner current loop
Gird voltage
feedforward
117
Figure 1. Configuration of star -connection three -phase CHB -STATCOM and schematic dual -loop 118
control block diagram. 119
3. CPS -PWM Method and Carrier Phase Difference Influe nce on Module A ctive Power Balance 120
3.1. Conventional CPS-PWM Method 121
Unipolar double -frequency modulation rule [2 9] is chosen for the PWM process in this paper , 122
which is shown in Figure 2 . During the voltage reference vx_ref is positive, if the carrier is between 123
vx_ref and -vx_ref in the blue area of Figure 2, the H -bridge module outputs positive voltage level UC. 124

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Otherwise, it outputs zero voltage level. During the voltage reference vx_ref is negative, if the carrier 125
is between vx_ref and -vx_ref in the red area of Figure 2 , the H -bridge module outputs negative voltage 126
level -UC. Otherwise, it outputs zero voltage level. 127
vx_ref
-vx_refCarrier
H-bridge output
UC
-UC0
128
Figure 2. Unipolar double -frequency PWM 129
With the double -Fourier analysis tool [ 30], the components with different frequencies in the 130
output voltage of the H -bridge module can be decomposed as (1) . 131
() () ( )C
C s c s c
2,4, 1, 3,4 1 πsin + sinπ 2n
mnU mMf t MU t J m n m tm    
= =  = + −  
(1) 132
where the initial phase angles for the voltage reference and carrier are set to be 0 and αc, respectively. 133
M is the modulation index. ωs is the fundamental angular frequency of the voltage reference and ωc 134
is the angular frequency of the carrier. Jn(x) is the Be ssel function [31 ]. 135
(1) indicates that, the output voltage of a single H -bridge module contains a fundamental 136
component , and sideband harmonic components whose frequencies are around the even multiples 137
of the fundamental frequency. The switching frequency is the dou ble of the carrier frequency. 138
Assume that N H-bridge modules are connected in series with constant capacitor voltage UC, 139
and the carriers for the modules have π/N phase shifter s, the cascaded output voltage F(t) can be 140
obtained as 141
() ()1
C
C s c s
2,4, 1, 3, 04 1 π πsin + sinπ 2N
n
m n LU mM mLF t NMU t J m n tmN    −
= =  =     = + −             
(2) 142
Taking N = 3 as an example, Figure 3 shows the vector graphs for the sideband harmonic 143
components for these three modules . When m ≠ 6k where k is a positive integer , the sideband 144
harmonics evenly distribute in the space as sh own in Figure 3(a), and they would not contribute to 145
the cascaded output voltage. When m = 6k, the amplitudes and phase angles of the sideband 146
harmonics are the same for the three modules as shown in Figure 3(b), so they would triple in the 147
cascaded output voltage. When N is another positive integer, similar conclusions can be drawn. 148
sin[(mωc+nωs-mπ/3)t]
sin[(mωc+nωs-2mπ/3)t]sin[(mωc+nωs)t]3sin[(mωc+nωs)t]
(a) (b)
149
Figure 3. Sideband harmonic vectors when N = 3. (a) m ≠ 6k. (b) m = 6k. 150

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Therefore, (2) is simplified as 151
() () ()C
C s c s
2 ,4 , 1, 3,4 1 πsin + sinπ 2n
m N N nU mMF t NMU t J m n tm   
= =  =+  
(3) 152
(3) indicates that, with the CPS-PWM method, the cascaded output voltage of N H-bridge 153
module s comprises a fundamental component , and sideband harmonic components whose 154
frequencies are around the 2N multiples of the fundamental frequency. So the equivalent switching 155
frequency raises to 2 N times of the carrier frequency. 156
It should be noticed that, in this case the phase shifter is π/N, and it is suitable whether N is an 157
odd or even. However, if the phase shifter is π/2N, this effectiveness only can be realized when N is 158
an odd . 159
3.2. Carrier Phase Difference Influence on Module A ctive Power Balance 160
Ignoring the power losses of the CHB -STATCOM, and assuming the capacitor voltages of the 161
modules are balanced, the vector graph s for the fundamental current and voltages in the CHB – 162
STATCOM are shown in Figure 4 in the case of N = 3. The output voltages of these three modules are 163
defined as f1, f2 and f3, respectively. The grid voltage and voltage on the buffer inductor are 164
determined as v and vL, respectively. i is the current in this loop. And their specified positive 165
directions have been given. As shown in the right part of Figure 4, f1, f2 and f3 have the same phase 166
angles with the gird voltage v, but the phase angle of the inductor voltage vL is opposite. Thus, the 167
current i leads vL by 90 degrees, but l ags v by 90 degrees. Therefore, in this circumstance, the converter 168
works in the inductive mode. As for the modules, because the vectors of the output voltages f1, f2 and 169
f3 are vertical to tha t of the current i, there is no active power flowing into the module, which ensures 170
the capacitor voltage to keep balance in this ideal state . Considering the power losses, the external 171
voltage loop shown in Figure 1 can manage the entire power losses of t he converter. 172
UC
UC
UCi
vf1
f2
f3vLf1i
vf1 f2 f3 vL
if2i
f3i
173
Figure 4. Vector graph s for CHB -STATCOM in ideal situation . 174
Seeing the module output voltage expression shown as (1), the fundamental component is 175
revealed in the first term, and the sideband harmonics are revealed in the second term. However, the 176
sideband harmonic clusters would affect the fundamental component wi th the following prerequisite . 177
c s sm n t  +=
(4) 178
Defining the carrier ratio ωc /ωs = K, (4) is simplified as 179
1n mK=−
(5) 180

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Substituting (4) and (5) into (1), the fundamental component resulting from the sideband 181
harmonics is calculated as 182
() ()C
1- s c
2,4,4 1 π' sinπ 2mK
mU mMf t J m tm
= =−  
(6) 183
The Bessel function has the following characteristics [31], 184
()()() 1 JJ
−=−
(7) 185
Thus, (6) can be rewritten as 186
() ()C
1 s c
2,4,4 1 π' sinπ 2mK
mU mMf t J m tm
−
= =− −  
(8) 187
Seeing Figure 5, the envelop of the Bessel function curves will converge to the zero axis with the 188
increasing order (mK-1). More over, 1/m appears in the coefficient, which is inversely proportional to 189
m. So in the following analysis, only m = 2 is considered considering the minimum ( mK-1) and 190
maximum 1/ m. With this assumption , (8) is further derived as (9). 191
0 2 4 6 8 10 12 14 16 18 20-0.500.51J0(x)
J1(x)
J2(x) J3(x) J4(x) J5(x)
x
192
Figure 5. Bessel function curves with different orders. 193
() ()()C
2 1 s c2' πsin 2πKUf t J M t − =− −
(9) 194
The carrier phase difference w ill lead to different initial carrier phase angle αc for each module . 195
Still taking the module number N = 3 as an example, the initial carrier phase angles for these modules 196
are 0, π/3, and 2π/3. Thus, the fundamental components resulting from the sideband harmonics for 197
each module are listed as 198
()()() ()1 s 2 s 3 s2π 2π' sin , ' sin , ' sin33f t A t f t A t f t A t         = = − = +             
(10) 199
where 200

()C
212ππKUA J M−=− (11) 201
These components are in positive sequence with the same a mplitude -A. And their amplitude is 202
influenced by the carrier ratio K and modulation index M with fixed UC. In Figure 6, the relationship 203
of (–A/UC) with varied carrier ratio K and modulation index M is interpret ed. In a fixed modulation 204
index M, with smaller K, (–A/UC) is lager. It indicates that, the carrier phase difference s for the 205
modules will lead to different fundamental components in the output voltage. This effect would be 206
more obvious when the carrier ra tio is relatively low. 207

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Taking this additional fundamental co mponent into consideration, Figure 7 redraws the vector 208
graph s for the modules. The black vector arrows show the synthesized fundamental component in 209
the output voltage of the modules. Obviously, the voltages are not vertical to the current for the 210
second and third modules, and it would inject the active power to the module or absorb the active 211
power from the module. The capacitor voltages cannot maintain balance in this case. 212
Although the additional fundamental component is relatively small compared with the initial 213
part shown in the first term in (1), the active power injecting or absorbing phenomen a are irreversible 214
during the CHB -STATCOM working period. And the capacitor voltages will diverge from the rated 215
value continually until to crash the system in the end. 216
217
Figure 6. Amplitude of additional fundamental component with varied modulation index M and 218
carrier ratio K. 219
f'3f'1
f1i
f2i
f3if'2UC
UC
UCi
vf1
f2
f3vL
220
Figure 7. Vector graph s for modules considering addition fundamental component s in output voltage 221
4. Proposed CPSR -PWM Scheme 222
In order to eliminate the unequal active power caused by the carrier phase difference in the 223
modulation process, the carrier of each module can rotate repeatedly after a period of time. At the 224
same time, in order to maintain the good harmonic characteristi cs of the cascaded output voltage , 225
this rotation must be carried out organically among the modules. The following analyzes this rotation 226
scheme when the module number N = 3, carrier ratio K = 2 and modulation index M = 5/6. 227

Energies 2020, 13, x FOR PEER REVIEW 8 of 15
As shown in Fig ure 8, in the modulation process of the se three modules, the period of the carrier 228
rotation is that of voltage reference , and this rotation is completed within the three reference periods . 229
It can be seen from the seven -level cascade output voltage that, the output volta ge waveform is not 230
affected by the carrier rotation and keeps the original good harmonic performance . 231
The active power of each module keeps dynamic balance in these periods. In order to achieve 232
this dynamic balanc e, the carrier rotation period for each mo dule must be an integral multiple of the 233
voltage reference period, and the rotation time should keep synchronous for all modules . Otherwise 234
the harmonic phase relationship shown in Figure 3 will not exist, which will inevitably affect the 235
quality of output voltage and current. 236
M1 outputRotation time Rotation time
Cascaded
output Module 1
M2 output
M3 outputModule 2
Module 3
237
Figure 8. CPRS -PWM scheme with rotation time at reference zero -crossing point 238
M1 outputRotation time Rotation time
Cascaded
output Module 1
M2 output
M3 outputModule 2
Module 3
239
Figure 9. CPRS -PWM scheme with rotation time at reference maximum point 240

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In Figure 8, the carrier rotation time is at the reference zero -crossing point. However, i n Figure 241
9, the rotation happens at the reference non-zero -crossing point . As long as the rotation period is an 242
integral multiple of the reference period, and the rot ation actions are carried out simultaneously for 243
all the modules, the good harmonic performance of the cascaded voltage can be achieved and the 244
active power of a single module c an also be dynamically balanced. 245
In the physical implementation of the propose d CPSR -PWM scheme , synchronous rotation 246
actions for all the modules may cannot be fully guaranteed because of the signal transmission delays 247
or errors. In order to enhance the system r obustness , the rotation time should be designed reasonably. 248
It is supposed that, the rotation time has 30-degree difference relative to the carrier period for 249
three modules, and Figure 10 , 11 illustrate the modulation processes and waveforms o f the cascaded 250
output v oltages with zero -crossing rotation and non -zero -crossing rotation. Table 1 concludes the 251
total harmonics distortions (THDs) in there two situations. In the given three reference periods, the 252
THDs of the cascaded output voltage in the zero -crossing rotatio n are lower than those in the non – 253
zero -crossing rotation, w hether in a single period or the whole periods. 254
Cascaded
output Module 1
Module 2
Module 3π/6
π/6
255
Figure 10. CPRS -PWM scheme with asynchronous rotation time at reference zero -crossing point 256
Cascaded
output Module 1
Module 2
Module 3π/6
π/6
257
Figure 11. CPRS -PWM scheme with asynchronous rotation time at reference non -zero-crossing point 258
Table 1. THD analysis of cascaded output voltage shown in Figure 10 and 11 259
Period 1 Period 2 Period 3 Period 1 ~3
Zero -crossing 24.81% 24.63 % 24.62 % 22.97%
Non-zero -crossing 24.97% 29.43 % 29.42 % 24.57%

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In Figure 12, the THDs of the cascaded output voltage with rotation time varying in a reference 260
period are concluded. Obviously, the rotation time should be at the reference zero -crossing point to 261
achieve the b est robustness of the system. 262
22.52323.52424.525THDs of cascaded voltage (%)
0 30 120 60 150 180 90
Rotation time relative to zero -crossing point (degree )
263
Figure 12. THDs of cascaded output voltage with different asynchronous rotation time 264
5. Experimental Verification 265
In order to demonstrate the feasibility and advantage of the proposed CPRS -PWM scheme for 266
CHB -STATCOMs, experimental ver ifications are carried out on a n experimental prototype whose H- 267
bridge module are shown in Figure 1 3. 268
H-bridge
Driver
DSP
controllerCapacitor
DSP
G4320F28335 PGF A
CG–72AE99WTMS
DSP
G4320F28335 PGF A
CG–72AE99WTMS
DSP
G4320F28335 PGF A
CG–72AE99WTMS
DSP
G4320F28335 PGF A
CG–72AE99WTMS
SamplingDual -loop
controlModule Module Module
Voltage
reference (SPI) Pulse
Carrier
synchronization
(CAP ) Pulse Pulse
269
Figure 13. Module picture of CHB -STATCOM prototype and hierarchical control structure 270
This prototype is based on a multi -digital signal processor (DSP, TMS32028335) hierarchical 271
control system [3 2]. The master DSP samples the necessary quantities, such as grid voltages, capacitor 272
voltages, compensating currents, and executes the dual -loop control programmer, then transmits the 273
calculated voltage reference to the slave DSPs in the modules using s erial peripheral interface (SPI) 274
communication. Simultaneously, the carrier synchronization signal generated by the master DSP is 275
capture d by all the slave DSPs. The proposed CPSR -PWM scheme is implemented in the slave DSPs 276
and the pulses are generated to drive the IGBTs. The system parameters are listed in Table A1 in the 277
Appendix . 278
Figure 1 4 gives the experimental waveforms the capacitor voltages, grid voltage and 279
compensating current. At t = 0, the capacitor voltages are about 33V under the uncontrolled rectifier 280
state. At t = 1s, the capacitor voltages are set to be boosted to the rated value 48V with the help of the 281
outer voltage loop . However, with the conventional CPS -PWM scheme, the voltages diverge from 282
the rated value due to the unbalanced active power among the modules resulting from the carrier 283
phase differences shown in Figure 1 4(a1). At t = 3s, a capacitive reactive current command 5A is given 284

Energies 2020, 13, x FOR PEER REVIEW 11 of 15
in the inner current loop. Unfortunately, the compensating current show n in Figure 1 4(b1) has a 285
severe distortion, whose THD is 67.027% and Figure 1 4(c1) draws its harmonic spectra. 286
With the proposed CPSR-PWM method shown in Figure 1 4(a2), (b2) and (c2) , the active power 287
of each module are balanced in a fundamental period and the capacitor voltage can relatively keep 288
balance. The reactive current has a low distortion with THD = 2.515%. 289
t (1s/div)UC_1 (10V/div)
UC_2
UC_3
0102030405060
Harmonic order2468101214161820THD =67.027%Amplitude (%)
246810121416182000.20.40.60.81.01.2
THD =2.515%
Harmonic orderAmplitude (%)t (1s/div)
v (100V/div)
i (5A/div)
t (10ms/div)
v (100V/div)
i (5A/div)
t (10ms/div)(a1) (a2)
(b1) (b2)
(c1) (c2)UC_1 UC_2 UC_3 (10V/div)
290
Figure 14. Experimental waveforms of capacitor voltages, grid voltage and compensating current 291
verifying feasibility of proposed CPSR-PWM . (a1) and (a2). Capacitor voltages with conventional 292
CPS- and proposed CPSR -PWM schemes. (b1) and (b2). Grid voltage and compensating current with 293
conventional CPS – and proposed CPSR -PWM schemes. (c1) and (c2). Fourier analysis of 294
compensating current with conventional CPS – and proposed CPSR -PWM schemes. 295
Although the proposed CPSR -PWM scheme can ensure the natural active power balance for the 296
modules of CHB -STATCOMs t heoretically , the inherent parameter differences exist in the modules 297
may t hreat en the system to operate in a long time . So in the following experiment, a module -level 298
capacitor voltage balance control proposed in [ 23] is adopted with the proposed CPSR -PWM. And 299
Figure 1 5 describes the experimental waveforms in this case. 300

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The balanced capacitor voltages and compensating current are displayed in Figure 1 5(a). At t = 301
100ms, th e inductive reactive current command is changed to be the capacitive one. And Figure 1 5(b) 302
and (c) shows the current and voltage waveforms simultaneously, which demonstrates the phase 303
relationship between them. Moreover, the harmonic clusters of the compen sating current verif y that, 304
the equivalent switching frequency raises to 6kHz, which is 2 N (N = 3) times of the carrier frequency 305
1kHz. 306
The THDs of the compensating currents in the inductive and capacitive modes are 3.147% and 307
1.611%, respectively, and ea ch single order harmonic amplitude is lower than 2% and 1% shown in 308
Figure 15(d) and (e) . These indicators meet the requirements provided by IEEE std. 519 -2014 [3 3]. 309
0.20.61.01.41.8
246810 1214161820 24 6810 1214 1618200.10.30.50.70.9
THD =3.147%THD =1.611%
Harmonic orderAmplitude (%)
Harmonic orderAmplitude (%)v (50V/div) v (50V/div)
i (5A/div) i (5A/div)i (5A/div)UC_1 UC_2 UC_3(20V/div)
t (20ms/div)
Harmonic spectra
(2kHz/div)t (10ms/div) t (10ms/div)(a)
(b) (c)
(d) (e)Harmonic spectra
(2kHz/div)
310
Figure 15. Steady -state e xperimental waveforms of capacitor voltages, grid voltage and compensating 311
current. (a). Capacitor voltages and compensating currents from inductive to capacitive mode. (b) 312
Grid voltage, compensating current and its harmonic distribution in inductive mode. (b) Grid voltage, 313
compensating current and its harmonic distribution in capacitive mode. (d) Fourier analysis of 314
compensating current in inductive mode. (e) Fourier analysis of compensating current in capacitive 315
mode. 316

Energies 2020, 13, x FOR PEER REVIEW 13 of 15
5. Conclusions 317
This paper proposes a CPSR -PWM scheme for CHB -STATCOMs. It can eliminate the carrier 318
phase difference influence on the active power balance for the H -bridge modules. And the 319
conclusions are brought out as follows. 320
1) The conventional unipolar double -frequency CPS-PWM is prefer red for CHB -STATCOMs. It 321
can elevate the equivalent switching frequency and minimize the harmonic distortion. However, the 322
carrier phase difference will result in the unbalanced active power for the modules, which causes the 323
diverged capacitor voltages and deteriorate the power quality of the compensating current. 324
2) A carrier rotation scheme is proposed with the CPS -PWM method. This composed CPSR – 325
PWM scheme can maintain the dynamic active power balance of the modules. And the carrier 326
rotation period should be an integer multiple of the reference. The rotation time should be at the 327
reference zero -crossing point to enhance the robustness of the system. 328
3) Experimental verifications are carried out on a downscaled CHB -STATCOM prototype. The 329
results reveal the feasibility of the proposed method. 330
Author Contributions: Conceptualization, C.X and K.D. ; methodology, C.X.; software, J.C.; validation, C.X., and 331
J.C.; writing —original draft preparation, C.X.; writing —review and editing, J.C. and K.D. ; supervision, K.D.; 332
funding acquisition, C.X. 333
Funding: This research was funded by National Natural Science Foundation of China [Research on l oss 334
optimization and capacitance reduction of capacitor -switching semi -full bridge (CS -SFB) MMC sub -module 335
based on SiC-MOSFET s and Si -IGBTs ], grant number [51807073 ]. 336
Conflicts of Interest: The authors declare no conflict of interest. 337
Appendix 338
Table A1. System parameters in experiment 339
Parameters Symbols Values
Cascaded module number N 3
Root -mean -square value of grid voltage v 82V
Module capacitance C 4.7μF
Compensating current reference Iq_ref 5A
Rated capacitor voltage UC_ref 48V
Buffer inductance L 8mH
Fundamental /reference frequency f 50Hz
Carrier frequency fc 1kHz
Equivalent switching frequency fE 6kHz
Sampling frequency fs 6kHz
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© 20 20 by the authors. Submitted for possible open access publication under the terms
and conditions of the Creative Commons Attribution (CC BY) license
(http://creativecommons.org/licenses/by/4.0/).
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