Dissertation on [302465]

Dissertation on

DESIGN OF EMI FILTER FOR FLASH LAMP POWER SUPPLY

In partial fulfillment of the requirement for the award of the degree of

MASTER OF TECHNOLOGY

In

EMBEDDED SYSTEMS & VLSI DESIGN

Submitted by:

Amrita Bhatt

(0206EC13MT21)

Under the guidance of:

Mr. Sunil Shah

Electronics & Communication Engineering

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

GYAN GANGA INSTITUTE OF TECHNOLOGY & SCIENCE, JABALPUR (MP)

RAJIVGANDHIPROUDYOGIKIVISHWAVIDYALAYA, BHOPAL (MP) Session 2013-2015

To, Date: / /2015

[anonimizat] (RGPV)

Airport Bypass Gandhi Nagar Bhopal-462033

Subject: Submission of M. Tech IV Semester (Reg.) [anonimizat].

Sir,

Please find enclosed here with the M. Tech (Embedded System and VLSI Design) Dissertation book entitled as "Design of EMI Filter for Flash lamp Power Supply" of Ms. Amrita Bhatt "IV Semester" student: [anonimizat] "Embedded System and VLSI Design" of our Institute. Her Enrollment Number is 0206EC13MT21. You are requested to do the needful regarding the viva voice examination.

Thanking You

You’re faithfully

Dr. Vinod Kapse

Principal

Encl : 1. One copy of M. Tech Dissertation book with one copy of CD.

2. Receipt of Examination Form.

GYAN GANGA INSTITUTE OF TECHNOLOGY & SCIENCE, JABALPUR (MP)

Approved by AICTE New Delhi & Govt. of M.P

([anonimizat])

FORWARDING LETTER OF PRINCIPAL/DIRECTOR

This dissertation entitled “Design of EMI Filter for flash lamp power supply” submitted by Ms. Amrita Bhatt (Enrollment No.-0206EC13MT21) is forwarded to the University in three copies. The candidate has paid the necessary fees and there are no dues outstanding against her.

Date:

Dr. Vinod Kapse

Director

Place: Jabalpur

GYAN GANGA INSTITUTE OF TECHNOLOGY & SCIENCE, JABALPUR (MP)

Approved by AICTE New Delhi & Govt. of M.P

([anonimizat])

BONAFIDE CERTIFICATE

This is to certify that the work entitled “Design of EMI Filter for flash lamp power supply” is a piece of research work done by Ms. Amrita Bhatt under my guidance and supervision for the degree of Master of Technology in Embedded system &[anonimizat] (M.P.) India. The dissertation has duly been completed and fulfills the requirement of ordinance to the M. Tech Degree of the University. To the best of my knowledge and belief the dissertation embodies the work of the candidate herself and that the work has not been submitted earlier in part or full for the award of any other degree.

Dr. Shailesh Khaparkar Mr. Sunil Shah

Head of the Department Mentor

Date………… Date…………

GYAN GANGA INSTITUTE OF TECHNOLOGY & SCIENCE, JABALPUR (MP)

Approved by AICTE New Delhi & Govt. of M.P

([anonimizat])

APPROVAL CERTIFICATE

This thesis entitled “Design of EMI Filter for flash lamp power supply” submitted by Amrita Bhatt (EnrollmentNo.-0206EC13MT21) is approved for the award of Master of Technology in ECE Department with specialization in Embedded System & VLSI Design.

Internal Examiner External Examiner

Date…………… Date……………

Rrcat wala certificate lagana hai

GYAN GANGA INSTITUTE OF TECHNOLOGY & SCIENCE, JABALPUR (MP)

Approved by AICTE New Delhi & Govt. of M.P

(Affiliated to Rajiv Gandhi Proudyogiki Vishwavidyalaya, Bhopal)

DECLARATION

I declare that the Dissertation entitled “Design of EMI Filter for Flash lamp Power Supply” is my own work conducted under the supervision of Mr. Sunil Shah, Electronics & Communication Engineering, at, Gyan Ganga Institute of Technology & Sciences, Jabalpur. I further declare that to the best of my knowledge, the dissertation does not contain any part of any work which has been submitted for the award of any degree either in this University or in any other University without proper citation.

Date: Amrita Bhatt

Place: 0206EC13MT21

DEDICATION

I dedicate my thesis work to my family. A special feeling of gratitude to my loving parents who encouraged and supported me throughout my life, my sister has never left my side and is very special for me. Thank you both for giving me strength.

To all my friends and special thanks to my best friend, thank you for your understanding and encouragement in my moments of crises. I cannot list all the names but you are always on my mind.

Thank you God for always being with me.

ACKNOWLEDGEMENT

I am grateful to Mr. Sunil Shah, Gyan Ganga Institute of Technology and Sciences, ECE Department, my Thesis Advisers & Mentor, for his valuable guidance and encouragement throughout the duration of my thesis work. I was greatly benefited from the technical discussions I shared with him which helped me in understanding the finer aspects of circuit design.

It is an honor for me to thank our Honorable Group Director, Dr. Maneesh Choubey, for his encouragement & blessings. I am grateful to our Director
Dr. Vinod Kapse, for his continuous support. I thank Prof. P.K Jain, Deputy Director, Gyan Ganga Institute of Technology and Sciences, and Dr. Shailesh Khaparkar, Head of Department, Electronics and Communication Engineering, for helping me out continuously during the course of my work. Without their help it would have been difficult to complete this thesis on time.

I would like to express my sincere gratitude to my co-guide Dr. M. S. Ansari, Scientific Officer/H, RRCAT, Indore, for the continuous support of my project work, for his patience, motivation, enthusiasm, and immense knowledge. His guidance helped me in development and writing of this thesis. I could not have imagined having a better advisor and mentor. Help and time to time guidance given by him will carry me a long way in the journey of life on which I am about to embark.

I would like to extend my gratitude to the many people who helped to bring this project work to fruition. I would like to thank Dr. P. D. Gupta, Director, Raja Ramanna Centre for Advanced Technology, Shri P. K. Kush, Chairman, Placement of Students for Project Work and Shri C. P. Navathe, Head, Laser Electronics Support Division, Raja Ramanna Centre for Advanced Technology, Indore for giving me this opportunity.

Last but not the least I thank Rajindra Singh Sehrawat, Deepak Kumar Sharma and Yogesh Sahu at LESD, RRCAT for their support and constant encouragement during project work.

Amrita Bhatt

0206EC13MT21

ABSTRACT

The M. Tech project described in this thesis deals with modeling, design, development and testing of an EMI filter for conducted mode noise in flash lamp power supply. The power supply consists of a capacitor bank charging section which consists of a 50 Hz resonant constant current charging circuit to efficiently store electrical energy on capacitor banks. It also consists of a trigger circuit which pre-ionizes a flash lamp pair to enable transfer of electrical energy from capacitor bank to flash lamp. Energy transfer generates pulsed and intense light to pump a solid state laser medium (Nd: glass). The charge and trigger cycle is pulsed and single shot operation, controlled by hardwired digital ICs. Study and mitigation of EMI conducted noise is important for smooth and reliable operation of the power supply and the control system. The filter developed in this thesis reduces differential and ground conducted common mode noise by a factor of 17 dB and 1.5 dB respectively.

First step in the EMI filter design process was to estimate frequency content of the pulsed noise. Frequency domain analysis of the noise pulse is difficult due to single shot and short duration (~ 500 to 1000 µs) of the EMI signal. Thus time domain measurement approach was adopted and maximum frequency content (100 kHz and 900 kHz for differential and common mode) was estimated by Fourier transform of the time domain measurements. Common mode choke and differential mode inductors were designed as part of the project work. Filter design was simulated with PSPICE. PCB layouts for filter sections were designed with the help of Altium PCB development tool. Before hardware testing on the flash lamp power supply, scattering parameters (S11, S12, S21 and S22) were measured to estimate the insertion loss. Performance of the filter was tested by utilizing a line stabilized network (LISN) which offers fixed 50 Ohms load in the frequency band 9 kHz to 30 MHz. The measured conducted noise in the frequency range 9 kHz to 1 MHz with the EMI filter was found to conform to the Military standard 461E.

Conducted and radiated electromagnetic interference in embedded and VLSI systems have become important in recent years with increase in clock frequency and reduction in physical dimensions of interconnects. It is important to understand the noise components in terms of current paths and the mitigation techniques. Although the common mode and differential mode components of conducted noise are analyzed in thesis in the context of a power electronics system, the analytical and theoretical techniques hold good for other domains as well such as embedded systems.

LIST OF FIGURES

Figure 2.1 CM noise distribution 22

Figure 2.2 DM noise distribution 23

Figure 2.3 Test setup with conducted emission measurement 24

Fig 2.4 CM & DM equivalent noise path with LISN 25

Fig. 2.5 Experiment setup for Mil standard 461E 28

Fig. 2.6 EMI standard on voltage 29

Figure 4.1 Flash lamp construction 32

Figure 4.2 Capacitor bank charging circuit 34

Figure 4.3 Photograph of Capacitor Bank 35

Figure 4.4 Trigger Circuit 36

Fig 4.5 Photograph of trigger Circuit 37

Figure 6.1 Common mode Choke 43

Figure 6.2 Measurement setup for leakage inductance 47

Figure 6.3 CM noise equivalent circuit 49

Figure 6.4 PSPICE Simulation of CM noise equivalent circuit 50

Figure 6.5 DM noise equivalent circuit 51

Figure 6.6 PSPICE Simulation of DM noise equivalent circuit 51

Figure 6.7 EMI filter topology 53

Figure 6.8 PCB Layout of EMI filter 55

Figure 6.9 Hardware of EMI filter 55

Figure 7.1 Schematic for noise measurement setup 58

Figure 7.2 Noise measurement setup with EMI filter 58

Figure 7.3 Differential mode noise measurement without filter 59

Figure 7.4 Differential mode noise measurement with filter 60

Figure 7.5 Common mode noise without filter 61

Figure 7.6 Common mode noise with filter 61

Figure 7.7 Line noise without EMI filter 62

Figure 7.8 Line noise with EMI filter 63

Figure 7.9 Noise spectrum at 100 kHz without filter 64

Figure 7.10 Noise spectrum at 100 kHz with filter 64

Figure 7.11 Noise spectrum at 900 kHz without filter 65

Figure 7.12 Noise spectrum at 900 kHz with filter 65

Figure 7.13 S parameter measurement setup 66

Figure 7.14 Test setup for S parameter 66

Figure 7.15 VNA plot for S11 67

Figure 7.16 VNA plot for S21 67

Fig A.1 Digital Oscilloscope 71

Fig. B.1 Current Probe 72

Fig. C.1 Line Impedance Stabilization Network 72

Fig. D. 1 Vector Network Analyzer 73

LIST OF TABLES

Table 2.1 List of Common EMI Regulations 27

Table 2.2 Standards Setting Institutions 27

Table 6.1 CM & DM choke values 48

Table 6.2 Capacitor values 51

Table 6.3 List of component values 54

LIST OF FLOWCHARTS

Flowchart 6.1 Flowchart for CM Choke design 46

Flowchart 6.2 Flowchart chart for EMI filter design 52

ABBREVIATIONS

Symbols

BSI British Standard Institute (UK)

CM Common mode

CHG Charge

CISPR International Special Committee on Radio Interference Operating under IEC (USA)

DM Differential mode

DOD Department of Defense (USA)

dBμV Decibel microvolt

EUT Equipment under Test

EMI Electromagnetic Interference

FCC Federal Communication Commission

Common mode current (A)

Differential mode current (A)

Phase current

Neutral current

Ground current

Current in primary winding

Current in secondary winding

IEC International Electro Technical Commission (USA)

KHz Kilo Hertz

LISN Line Impedance Stabilization Network

L or P Line or Phase conductor wire

MHz Mega Hertz

N Neutral conductor wire

NC Normally closed

NO Normally open

SSR Solid State Relay

TRG Trigger

Phase voltage

Neutral voltage

Input Voltage

Voltagein secondary winding

VDE Verband Deutscher Electrotechniker (Germany)

Xe Xenon

Capacitive Reactance

Inductive Reactance

CHAPTER 1

INTRODUCTION

This chapter presents objectives and scope of the project work. It also outlines the thesis organization. EMI filter to reduce conducted noise is designed for flash lamp power supply. The power supply mainly consists of a capacitor bank, charging circuit and a high voltage trigger circuit to discharge the stored energy through flash lamps. Discharge of the capacitor energy excites flash lamp resulting into generation of intense light which in turn is used to pump Nd: glass lasers. Repetition rate is typically one shot in five minutes. Design of EMI filter for both Common Mode (CM) and Differential Mode (DM) noise is presented. EMI can be categorized into radiated and conducted emission. Radiated emissions are generated due to antenna effect of the system interconnects. Each of the interconnect presents impedance discontinuing resulting into radiated noise. Conducted noise on the other hand propagate through the interconnect media such as cables and connectors.

To reduce the potential harm of EMI, organizations such as FCC, CISPR, define Electromagnetic compatibility (EMC) regulations which must be strictly followed. These standards define the limit of measured interference level, the specific equipment’s for EMC test as well as the corresponding measurement setup for these tests. To mitigate the conducted noises, many solutions have been reported. At the EMI source, techniques such as soft switching, snubber circuit, spread spectrum control scheme can effectively reduce the noise level. On the propagation path, improvements on the layout and implementation of EMI filters can further reduce the outgoing noises. Among all these techniques, using an EMI filter is one of the most practical and reliable solution to achieve the compliance with EMC standards. EMI filters are basically low-pass filters which are transparent to nominal current (e.g. 50 Hz) but that have large suppression for conducted noises between 150 kHz to 30 MHz.

Problem Statement

The M. Tech. project described in this thesis looks into the design and development aspects of an EMI filter for common and differential mode noise in a pulsed flash lamp power supply. The flash lamp circuit is used to optically pump a solid state Nd: glass laser amplifier. Transient and low repetition rate of the capacitor charging power and trigger circuits entails a time domain measurement approach. Spectral estimation of the noise is carried out post measurement by using Fourier transform of the measured signal. The thesis describes design steps of the filter design, filter characterization by S-parameter measurements and estimation of insertion loss in frequency domain. Highest frequency components observed in the conducted emission of the flash lamp power supply for common and differential modes are 100 and 900 kHz respectively. These frequencies are taken as cutoff frequencies for the filter design. C-L-C pi topology and LC topology are used for differential and common mode filter designs respectively.

1.2 Structure of the Thesis

This thesis organized as follows

Chapter 2 entitled EMI Analysis reviews the conducted and radiated mode electromagnetic interference. EMI filter developed in this project is designed to attenuated conducted noise. Conducted noise has two components namely common mode and differential mode. This chapter also includes comparison of generated EMI with an EMC standards such as FCC, EN, CISPR, VDE, and military standards.

Chapter 3 entitled Literature survey of this thesis provides comprehensive summary of the relevant literature.

Chapter 4 entitled System Description is dedicated to the description of flash lamp, charging circuit and trigger circuit of power supply.

Chapter 5 entitled Design and Simulation introduces the design steps of common mode choke. A practical filter design procedure is also presented. It also describes the other main components of EMI filter: common mode capacitors (X capacitors) as well as differential mode capacitors (Y capacitors). An equivalent circuit of EMI filter is presented and validated.

Chapter 6 entitled Platform Used provides overview of OrCAD 9.3v software, used for PSpice simulation of filter and Proteus 8.0v for PCB designing.

Chapter 7 entitled Measurement and Test result describes the measurement procedures and test results for the designed filter. The measurements are carried out with fixed (50 Ω) loads presented by a LISN. Insertion loss of the filter is also measured.

Chapter 8 entitled Conclusion and Future work concludes the thesis with recommendation for future research possibilities.

CHAPTER 2

EMI ANALYSIS

This chapter deals with various aspects of conducted EMI noise. Origin and path of common mode (CM) and differential mode (DM) are discussed. Switching of large voltage or current generates electromagnetic interference in different frequency range. In general emission below 30 MHz is transferred to other devices through conduction mode. Beyond 30 MHz the EMI transmission is through radiation. Conducted emission is divided into common mode and differential mode.

2.1 Components of Conducted EMI

Conducted EMI noise is characterized as common-mode (CM) and differential-mode (DM) noise. CM noise is defined as noise generated due to common mode current ICM on line (L) and neutral (N).It returns through ground conductor wire. Common mode current flows in same direction from L and N and is coupled through parasitic capacitance to ground conductor wire. Total common mode current through ground conductor is 2ICM as shown in Fig. 2.1. Common Mode noise can be coupled with the high frequency transformers or along paths that have parasitic capacitance, path may exist within power supply and is more dominant in smaller sized power supplies. Common Mode noise is present on both input and output lines.

Figure 2.1 CM noise distribution

DM noise is generated due to differential mode current ().It follows from line (L) and returns back through neutral (N) conductor wire. Differential mode current propagates in opposite direction on L and N as shown in Fig. 2.2. In conventional switched mode power supplies DM noise is mainly caused by converter currents and is attenuated by the input filter capacitor. DM current flows in and out of the power supply through the power leads and to load. Ideally, no differential mode current flows through the ground connection. The capacitors may damage if the noise is opposite in polarity or more then operating limits.

Figure 2.2 DM noise distribution

2.2 Measurement of Conducted EMI

Conducted mode noise is estimated by measuring noise current across a stabilized impedance of 50 Ω. Line Stabilized Impedance Network (LISN) is used for this purpose. Conducted emission regulated by FCC lies in the range of 450 kHz to 30 MHz whereas in CISPR 22 this range is from 150 kHz to 30 MHz. When testing a device, for compatibility with FCC and CISPR 22 limits, a LISN is placed between device under test and power output. Due to difference in frequency ranges of FCC and CISPR regulations, LISN have similar layouts but different component values. Figure 2.3 shows test setup for compliance test of conducted emission. As shown in the figure 2.3, ac powers to device under test are fed through LISN. Ports are available in LISN which is monitored by spectrum analyzer or DSO to estimate conducted noise on AC phases. Since the output current from device under test depends on load on ac power line, and this load is the impedance seen by the device looking into the ac power output, which varies considerably over the measurement frequency range from output to output, it is not sufficient to measure the noise currents on the power line with a current probe. The device under test is connected to LISN as mentioned earlier, the first purpose of LISN is to stabilize device under test. Second purpose is to block external noise that exit’s on the power supply line entering the device’s power line. Any noise currents from the power supply line that enters the device’s ac power line will add to conducted emission from device. It is important that the LISN prevents noise entering from power supply line to the device’s power line. LISN must satisfy objectives over entire frequency range of conducted emissions 450 kHz-30 MHz for FCC regulations and 150 kHz-30 MHz for CISPR 22 regulations.

Figure 2.3 Test setup with conducted emission measurement

2.3 Analysis of Common and Differential Mode Currents

As discussed in section 2.2 purpose of LISN is to provide standard impedance of 50 Ω to line and neutral wires of a device so that conducted emission can be measured on current through these impedances. Equivalent circuit of conducted noise measurement setup with LISN is shown in figure 2.3. In this figure, circuitry of LISN is replaced by two loads of 50Ω which represents LISN, at frequency band, where conducted emission is to be measured [18]. From figure 2.4, equations for phase current and neutral current are as follows:

(2.1a)
(2.1b)

By adding equation 2.1 (a) & (b), we get;

(2.2a)

And by subtracting equation 2.1 (a) & (b), we get;

(2.2b)

Therefore, for common mode;

(2.3)
(2.4)

Fig 2.4 CM & DM equivalent noise path with LISN

(2.5a)
(2.5b)

Substitute equations 2.1 (a) & (b) in equation 2.5 (a) & (b), and derive equivalent common-mode noise and differential-mode noise voltage across the 50 Ω impedance of the LISN.

Therefore, by measuring voltage across impedance using spectrum analyzer, common mode current and differential mode current can be measured as;

Current through phase, neutral and ground is denoted by, and respectively.The common mode current that exists by returning on the ground wire is not a part of the design of the power supply instead ground wire provide path for current at 50 Hz. However, under pulsed condition where conducted emissions are measured, ground wire carry common mode current that can cause a product to fail regulatory standards.

2.4 EMI Standards

There are several standards for different types of applications in EMI analysis. These standards differ by their frequency range or amplitude of noise and whether the type of noise measured is in form of voltage or current. They have their own noise measurement experimental setup, and LISN circuits. Most common EMI standards begin at 150 kHz and end in megahertz range about 30 MHz, like DO160D standard [18]. However military standard 461E [19] starts at 10 kHz and end at 10 MHz. Government bodies have instituted standards which set specific limits on the quantities of radiated and conducted noise emissions in order for a product to be sold within a country. Federal Communications Commission (FCC) and the Department of Defense (DOD) are regulatory bodies in United States whereas; European Economic Consortium (EEC) standards are set by the Europe. There also exists an international body known as International Special Committee on Radio Interference (CISPR) and a committee of the International Electron technical Commission (IEC), which sets standards that, is then adopted by individual nations to facilitate international trade. Table 2.1summarizes EMI standards for different application areas; Table 2.2 shows some standard setting institutes [20].

Table 2.1 List of Common EMI Regulations

Table 2.2 Standards Setting Institutions

Figure 2.5 shows measurement setup for compliance test under the military standard 461E. Different experimental setups are given by Military Standard 461 E. However, this is the general setup shown in Fig. 2.3. It consists of a table covered with ground plane where LISN and equipment under test (EUT) are placed. These two equipment’s are connected through a 2m long power line wire placed on a non-conductive stand of 5cm height to avoid disturbances from ground [21].

Fig. 2.5 Experiment setup for Military standard 461E

In comparison with other standards, the Military 461 E has a frequency range limit from 10 kHz to 30 MHz Fig. 4.5 defines the maximum noise limit for conducted EMI noise.

Fig. 2.6 EMI standard on voltage

Other restrictions and standards exist, such as the power characteristic given by the Military Standard 704 F [22], but this research focuses on the subject of EMI and does not consider other power standards. On the other hand, some constraints apply to the maximum common mode capacitance allowed in the EMI filter due to the grounding current safety standard. According to the SAE AS 1831 standards [23], the maximum capacitance value is set to 100 nF per line to ground. The leakage capacitance to ground at the user interface shall not exceed the lower of 0.005 μF/kW of connected load or 0.1 μF measured at 1 kHz for each user equipment DC power and return line. The filter design follows this standard to limit the CM current going through the ground as well as setting a baseline for comparison between the different versions of version.

2.5 Conclusion

This chapter provides the analysis of conducted EMI noise. Two major components of the conducted noise i.e. common mode and differential mode are described.

Different standards for conducted EMI are described. Noise threshold and measurements setup for military standard (461 E) are given in detail. Measurement results and effect of EMI filter on conducted noise are discussed in subsequent chapters. Comparison of measured noise vice a versa military standard 461 E is carried out.

CHAPTER 3

LITERATURE SURVEY

P. V. Y. Jayasree, “Design of Active Electromagnetic Interference Filter to Eliminate Common-mode Noise in Conducted Interference” April 2012.

This paper proposes a user interface for practical EMI filter design. This interface is easy to use and able to find out component values. The principle of design is based on calculation of electromagnetic noises measured by spectrum analyser, then the algorithm tries to find cut-off frequency of the filter in order to obtain attenuated noises respecting to an EMC standard.

Shih, Fu-Yuan; Yie-Tone Chen; Yan-Pei Wu; Yie-Tone Chen, "A procedure for designing EMI filters for AC line applications," Power Electronics, IEEE Transactions on , vol.11, no.1, pp.170,181, Jan 1996

In this paper a design method of ac line EMI filters is presented. This procedure is based on the analysis of conducted EMI problems.

Shashwatee Paul, Sri. S. Srinivasa Rao, “Power Line filter design using equivalent circuit of passive lumped components”, 2014

A methodology to design power line filter, using conventional technique of composite low pass filter is presented. It is based on model where common mode and differential mode interference is considered separately in filter design. In this paper, filter design process is carried out, by considering effects due to non-ideal behaviour of passive lumped components. A proposed model of the power line filter design is based on parasitic effect of passive lumped elements.

J. Jiraprasertwong, and C. Jettanasen, “Practical design of a passive EMI filter for reduction of EMI generation”, International Multi Conference of Engineers and Computer Scientists 2015 Vol II, IMECS 2015, March 18 – 20, 2015, Hong Kong

Electromagnetic Interference (EMI) usually generated by a power converter can disturb or damage nearby sensitive electrical/electronic devices/equipment. The use of EMI filter inserted in the considered system is a classical technique for EMI reduction. In order to spend less time and have low cost, this paper proposes a user interface for practical EMI filter design. This interface is easy to use and able to rapidly find out the filter component values. The principle of this design is based on calculation from electromagnetic noises measured by spectrum analyzer, then the algorithm tries to find the cut-off frequency of the filter in order to obtain the attenuated noises respecting to an applied Electromagnetic Compatibility (EMC) standard.

Robert West, “Common mode inductors for EMI Filters require careful attention to core material selection”, Magnetics, Division of Spang & Co., Butler, Pennsylvania

In this paper a design procedure of common mode choke is presented. The common mode inductor is an integral part of most EMI filters and due to very high impedance over a wide frequency range suppresses high frequency power supply spikes.

CHAPTER 4

POWER SUPPLY SYSTEM DESCRIPTION

This chapter discusses pulsed power system and trigger circuit for Xenon flash lamps. EMI filter as discussed and developed in other parts of this thesis is designed for the flash lamp power supply. The power supply transfers electrical energy to flash lamp at very low repetition rate. Typically one shot (comprising of charge and discharge cycle) is taken in five minutes. Width of the discharge current, which is source of EMI, is round 500µs. Therefore, the system has extremely low duty cycle.

4.1 Flash lamps

Flash lamps are pulsed source of intense light. It is used in diverse areas such as pumping source in solid state lasers, clinical gas analysis, medical applications etc. Xenon flash lamps are used in Nd: glass solid state lasers as source for optical pumping [17]. Flash lamps are made up of fused quartz tubing with a typical wall thickness of 1mm. Each end of the tube is sealed to an electrode assembly by quartz to metal seal. Lamps are filled with xenon gas at (300-400 Torr). Flash lamps are available in wide ranges of size in both linear and helical configurations.

Figure 4.1 Flash lamp construction

Figure 4.1 shows a typical, linear gas filled flash lamp. Flash lamps are operated by transferring electrical energy stored on energy storage capacitors to the flash lamp gas with the help of a high voltage trigger pulse. Several methods employed for flash lamp triggering are:

Series Triggering

Parallel Triggering

In the present work series triggering method is used by applying high voltage pulse (10-15kV) through the secondary of a pulse transformer connected in series with flash lamp. Capacitor banks are charged by a 50 Hz resonant constant current source. Flash lamp discharge network consists of the energy storage capacitor banks and trigger transformer secondary. Flash lamp peak current and duration depends on the circuit components mainly capacitor (C), trigger transformer secondary (L) and flash lamp impedance (Z). The flash lamp impedance depends on gas discharge length.

4.2 Flash lamp power supply

Flash lamp power supply consists of a capacitor charging circuit and a trigger circuit. The trigger circuit enables transfer of stored energy into flash lamp gaseous media which generates emission of intense and broadband light.

4.2.1 Charging Circuit

Capacitor bank charging circuit for which EMI filter is designed in this project is based on constant current (CC) scheme. Constant current charging scheme has following advantages:

Higher charging efficiency approx. 90%

Inherent short circuit protection

Better charging speed

This is to be contrasted with conventional constant voltage (CV) and resistance charging scheme in which the charging voltage VC remains constant. Constant voltage (CV) scheme has charging efficiency of 50%.Furthermore; these are not inherently short circuit protected. Figure 4.2 below, shows the resonant constant current charging circuit.

Figure 4.2 Capacitor bank charging circuit

Capacitor (Cr) in combination with mains transformer (230V/4.5kV) form 50 Hz resonant circuit. Under resonant condition current becomes constant and the primary current is given by;

(4.1)

where XC and XL represents the capacitive and inductive reactance respectively. Figure 4.3 shows photograph of the capacitor bank in the flash lamp power supply. Accordingly, the transformer secondary current is given by;

(4.2)

Figure 4.3 Photograph of Capacitor Bank

The energy storage capacitor (C) is charged by this constant current. Each capacitor bank is isolated by an isolation resistance R1.Charging cycle is started by a control system command which puts ON the Solid State Relay (SSR). The capacitor voltage is monitored by control system through a 1000 Ω potential divider network. Once the capacitor is charged to desired voltage the charge cycle is stopped by putting OFF the SSR. Energy stored on capacitor bank is dumped in the flash lamp pair by applying a high voltage trigger pulse through a trigger circuit and the step up pulse transformer. Normally closed (NC) connection of RL1 connects and disconnects the bleeder (dump) resistor RD.

4.2.2 Trigger Circuit

A high voltage (10-15 kV) pulse of 10 µs duration pre-ionizes the flash lamp gas such that the electric energy stored on capacitor bank is efficiently transferred and converts to optical energy. High voltage trigger pulse establishes a streamer arc in the lamp which decreases the lamp resistance. As mentioned earlier, series triggering scheme is used in the power supply examined in this project work.

In series triggering configuration, secondary of the trigger (pulse) transformer is connected in series with flash lamp. Thus the flash lamp current flows through secondary of pulse transformer. Figure 4.4 shows the trigger circuit.

Figure 4.4 Trigger Circuit

Trigger signal from control system activates relay RL2 which charges capacitor C1 to peak value of 400 V. Charging current path is through R1, D1 and primary of the trigger transformer, relay RL1 and solid state relay SSR. After capacitor C1 is fully charged fire signal from control system switch ON the silicon controlled rectifier (SCR). This discharges C1 through low impedance SCR (in switched ON condition) and primary of the trigger transformer. The discharge cycle results into a pulse which is stepped up and applied across the flash lamp terminals. Figure 4.5 shown below is photograph of the trigger circuit of flash lamp power supply which consists of following parts:

Pulse Transformer

Solid state relay

Rectifier

Relay

AC power termination

Resonant Capacitors

Fig 4.5 Photograph of trigger Circuit

4.3 Conclusion

This chapter describes pulse power supply and trigger circuit for flash lamps. Operation of flash lamp generates a pulsed current of the order of 1 kA peak at capacitor voltage of 2 kV. The pulsed current generates transient conducted electromagnetic interference which is analyzed in following chapters.

CHAPTER 5

PLATFORM USED

5.1 OrCAD

OrCAD is a software tool suite used primarily for electronic design automation (EDA). The software is mainly used by electronic design engineers  to create electronic schematics and electronic prints for manufacturing printed circuit boards (PCB’s).

The name OrCAD reflects the company and its software's origins: Oregon + CAD.

Founded in 1985 by John Durbetaki, Keith Seymour, and Ken as “OrCAD Systems Corporation”, the company became a supplier of desktop EDA software. Since, 16 July 1999, OrCAD's product line is owned by Cadence Design System. The latest version of OrCAD CIS schematic capture software can also maintain database for available integrated circuits. OrCAD, as an EDA tool consists of schematic editor Capture, circuit simulator PSpice and PCB designer.

5.1.1 OrCAD Capture

OrCAD Capture is schematic capture application, and part of OrCAD circuit design suite. Unlike, NI Multisim, Capture does not have in-built simulation features, but exports netlist data to simulator i.e. OrCAD EE. Another feature of Capture is that it also exports hardware description of the circuit schematic to Verilog or VHDL, and netlists to OrCAD Layout, Allegro etc. Capture consists of component information system (CIS), which links component package footprint data and/or simulation behavior data to circuit symbol in the schematic. It also includes TCL/TK scripting functionality that permits user to write script, which allows customization and automation. The OrCAD Capture outlet allows its customers to share, sell add-ons, and design resources. These add-ons are capable to customize the design environment, features, and other capabilities to it. Capture allows interface with any database which complies with Microsoft's ODBC standard etc. Data in an MRP, ERP, or PDM system can be directly accessed during component decision-making process.

5.1.2 OrCAD EE PSpice

OrCAD PSpice is an application used for simulating and verifying analog and mixed-signal circuits. OrCAD PSpice typically runs simulations for circuits that are pre-defined in OrCAD Capture, and can be integrated with MATLAB/Simulink, using Simulink to PSpice Interface (SLPS). PSpice is abbreviation of “Personal Simulation Program with Integrated Circuit Emphasis.” Analyzation of the circuit is done using PSpice, and it is described by a circuit description file, processed by PSpice, and finally executed as a simulation. An output file is created by PSpice to store simulation results, and such results can also be graphically displayed with the help of OrCAD EE interface. This is an upgraded version of PSpice simulator; it includes automatic circuit optimization and supports waveform recording, viewing, analysis, curve fitting, and post-processing. OrCAD EE also consist extensive library of models of physical components, including approx. 30,000 analog as well as mixed-signal devices and some mathematical functions. In addition, it also includes a model editor, support for auto-convergence, checkpoint restart, parameterized models, magnetic part editor, and several internal solvers.

5.1.2.1 Analyses

PSPICE supports three types of analyses:

DC analysis – For circuits with consists of time – invariant sources e.g. steady-state DC sources. Calculates nodal voltages and branch currents over different range of values, types included are logarithmic sweep, sweep over list of values, and linear sweep.

Transient analysis – Used in circuits which consists of time-variant sources e.g., sinusoidal or switched DC sources. Calculates node voltage and branch current over a time interval and outputs their instantaneous values.

AC analysis- Small signal analysis of circuits with sources consisting of varying frequencies. Calculates the magnitude, phase angles of nodal voltages and branch currents over different range of frequencies.

5.1.3 OrCAD PCB Designer

OrCAD PCB designer is printed circuit board design application. It consists of various automation features for PCB designing, board-level analysis and design rule check (DRC). It can be done manually by tracing PCB tracks, or by using auto-router. OrCAD Capture and PCB designer are integrated, using component information system (CIS) which stores information about circuit symbols and its matching footprints.

5.2 Conclusion

This chapter describes the software platform used i.e. OrCAD PSPICE for common mode, differential mode and EMI filter design and simulation separately.

CHAPTER 6

DESIGN AND SIMULATION

This chapter describes EMI filter design. Design steps of common mode choke and practical filter design procedure is presented. It describes selection criteria of other main components of EMI filter i.e. common mode capacitors (X capacitors) and differential mode capacitors (Y capacitors). An equivalent circuit of EMI filter is presented. At initial stage the design parameters considers total conducted noise i.e. inclusive of CM and DM components. EMI filter for conducted noise consists of two different sections corresponding to CM and DM noise. The design process begins with estimation of highest frequency components present in the system. For the power supply, under consideration the highest frequency components of differential mode noise is estimated to be 100 kHz, whereas, the highest frequency component of CM noise is estimated to be 900 kHz. It is based on the peak spectral content of Fourier transform of the noise pulse measured on L, N and ground lines. The filter design for DM noise is based on C-L-C (π) section whereas for common mode noise is LC section. Component values are selected on the basis of 3 dB cut-off frequency. Following are the reasons required to know the purpose of designing the Common Mode (CM) filter. Design criteria also consider the required insertion loss and source impedance. Design of common mode choke is based on selection of core with estimated value of inductance and number of turns. Leakage inductance from the common mode choke contributes to form inductance value of DM filter. The filter design was validated by PSPICE Simulation.

6.1 Design steps for Common Mode Choke

Ferrite cores are generally used in development of common mode choke. A torodial ferrite core CEL T-45 HP3 C of average diameter 36mm is used in this project. Toroids shaped cores have following advantages:

Toroids are cheaper than the other shapes because they are in one piece whereas; other shapes are in two halves.

Toroids have highest effective permeability for any core shape. The two-piece construction of the other shapes induces an air gap between the pieces, which lowers the effective permeability of the set (typically by about 30%) [24].

This section describes the design steps for CM choke. Common mode inductor consists of two windings each with equal number of turns. The windings placed on the core such that line return neutral current creates the fluxes that are equal in magnitude and opposite in phase. These two fluxes cancel out each other, and leave core in an unbiased condition. The common mode currents are attenuated by the choke.

Figure 6.1 Common mode Choke

The three important parameters for common mode inductor design are as follows:

Input current- Input current determine the size of the conductor needed for windings. Single stranded wire is mostly used because it is least expensive and its main contribution is to attenuate noise within high frequency skin effect losses.

Frequency- A first order filter provide attenuation that increases by -6 dB per octave beyond the corner frequency. Cut off frequency is an important parameter for CM choke design.

The parameter values chosen for EMI filter in this project are:

Current Rating- 3A

Cut-off frequency- 900kHz (Common mode noise)

Based on these parameters, design steps of common mode choke is given. The requirement of input current for this project is of 3 Ampere current density at 400 A/cm2 [23] yields a wire area of 0.007 cm2. As input current determines the size of conductor needed for winding therefore, a wire of 1.3 mm diameter (with insulation) and 1 mm diameter (without insulation) is selected which consists of Teflon insulation. Further calculate minimum required inductance (Lmin) based on XS which is series inductive reactance. This represents that the calculated value of Lmin is the lowest and is equated as [23];

(6.1)

Where XS is taken as 100Ω, fC is cut-off frequency and its value is taken as 900 kHz. By substituting values of XS and fC, value of Lmin is;

Since it is minimum inductance so,

Next step is to choose core size and material. A ferrite core is used to design common mode choke and its dimensions are as follows: inner diameter (ID) 27.5 mm and outer diameter (OD) 44.6 mm. Suitability of core is determined by finding (). For determining AL value, an experimental measurement was made where L=0.65 mH for 20 turns. From this value AL was calculated as,

(6.2)

(6.3)

k= constant

Now taking ratio of equation (6.3) to (6.2) so we get,

Where value of L was measured to be 0.65 mH for 20 turns;

Next needed parameter is the inner circumference (I.C.) of the ferrite core. This determines the maximum number of turns that can be wounded. Inner circumference (I.C.) formula is given by the following form [23]:

(6.4)

By using inner circumference parameter calculate maximum number of possible turns on ferrite core using formula [23];

(6.5)

Further calculating maximum inductance for 7 turns which consists of previously known parameters number of turns (N) and Inductance factor () in mH/1000 turns. To calculate maximum inductance following equation is used [23];

(6.6)

Where, N=7 turns and,

AL=1675 mH/1000 turns

Substitute values in eq. (5.6) we get,

Common mode inductance lies between and . To determine the required parameters are cut-off frequency () and Y-capacitors (). Y-capacitors ( is normally limited to 3300 pF for 50 Hz operation due to safety leakage current requirement [4]. 3 dB cut-off frequency for common mode noise is taken to be 900 kHz. This is based on the value of spectral content in measured noise. If we take according to [4] and by calculation then, the cut-off is;

(6.7)

This is significantly lower than the required cut-off frequency (900 kHz). To achieve the cut-off frequency of 900 kHz the value of is lowered to 100 pF. For which the value of inductance is . The required number of turns is given by;

Design flowchart is shown below in flowchart 6.1;

Flowchart 6.1 Flowchart for CM Choke design

6.2 Design steps for DM choke

Based on description given in section 6.2 Leakage Inductance () of common mode choke can be utilized as a differential mode choke. Separate DM choke may not be necessary in cases where the leakage inductance id sufficient. Practically, is in range of 0.5-2% of value [4]. A setup for measurement of leakage inductance in common mode choke is shown below in figure 6.2. The measurement value of leakage inductance is found to be .

Figure 6.2 Measurement setup for leakage inductance

Measurement is done using LCR meter and pre-designed common mode choke. It is done by connecting terminal 1 and terminal 2 to the LCR meter and remaining two terminals i.e. 1’ and 2’ are shorted. The cut-off frequency of DM noise is selected to be 100 kHz. An appropriate value of DM filter capacitor () is selected as 63 nF. For this value of frequency and capacitor the effective value of differential mode inductance is equal to 0.04 mH. This value includes equivalent leakage inductance from common mode choke. Next step is to determine number of turns and it requires value of which is determined using equation;

Next is to find number of turns for DM choke;

Thus, the differential mode choke of value 0.013 mH will result in an effective of value 0.04 mH.

Table 6.1 CM & DM choke values

6.3 Design steps for CM Filter

From section 6.1 taking value of common mode choke & design common mode filter by deriving value of Y-capacitors () and filter corner frequency .

are normally limited to 3300pF for 50Hz operation. It is limited because of some safety leakage current requirement [4].

As we know that,

(6.8)

Since, there are two Y capacitors and are in parallel,

(6.9)

(6.10)

Substitute values of and f R,CM in equation 5.10

Figure 6.4 shown below is the equivalent circuit for CM noise which is designed on ORCAD Capture. It comprises of a common mode inductor and which makes , Y capacitors of value 86pF each and corner frequency is 900 kHz in addition which resembles to flash lamp. Simulation is obtained on the basis of input current . Since, in CM filter current flows in same direction from line, neutral and returns from ground therefore common mode current is .

Figure 6.3 CM noise equivalent circuit

Fig 6.4 describes PSPICE Simulation of above shown figure 6.3 where point A shows -3dB at approx..

Figure 6.4 PSPICE Simulation of CM noise equivalent circuit

6.4 Design steps for DM filter

The differential mode filter is based on capacitors and inductance value of is chosen as 63 nF and the calculated value of differential mode inductance () is 0.04 mH. consists of common mode leakage inductance as discussed in section 6.2

Figure 6.6 shown below is the equivalent circuit for DM noise which is designed on ORCAD Capture. It comprises of a differential mode inductor and which makes , X capacitors of value 63 nF each, and corner frequency is 100 kHz in addition which resembles to flash lamp. Simulation is obtained on the basis of input current . Since, in DM filter current flows in opposite direction from line and returns back from neutral.

Figure 6.5 DM noise equivalent circuit

Fig 6.6 describes PSPICE Simulation of the ciruit shown figure 5.5 where point A shows 3dB attenuation at .

Figure 6.6 PSPICE Simulation of DM noise equivalent circuit

Table 6.2 Capacitor values

6.5 Design of EMI Filter

Flowchart 6.2 shows design of complete EMI filter and these blocks of filter are explained below. EMI filter consists of two sections (a) CM filter and (b) DM filter. These two sections are designed independently in section 6.3 & 6.4 with the help of flow chart. Based on discussions given in above sections, procedure for EMI filter design is described.

Flowchart 6.2 Flowchart chart for EMI filter design

It is noted that the main objective of this procedure is to meet the high frequency specifications. First block of flowchart 6.2 is to determine corner frequency by use of LISN and value for common mode is 900 kHz and for differential mode 100 kHz.

Figure 6.7 EMI filter topology

A typical procedure used in [4, 5] is considered to design power line EMI filter. A basic network topology is used C-L-C for DM filter and L-C for CM filter to attenuate both CM and DM noise. From figure 5.7 it is noted that some elements of filter affect either CM or DM noise and some affect both CM and DM noise. The capacitors affect DM noise whereas; capacitors attenuate both CM and DM noise. The main component of the filter is common mode choke () which attenuates only CM noise but leakage inductance () between two windings of affect DM noise only. It could be helpful in some cases an additional inductor in series with the choke to increase the total DM inductance if the leakage produced by CM choke is too small [21].

Equivalent circuit of the filter for CM and DM mode is represented in figure 6.3 and figure 6.4 respectively. Network topology for CM filter is L-C type with capacitors connected in parallel. And, similarly for DM filter topology used is C-L-C or π type where two capacitors are used. Main point to be noted is that the LISN is characterized for each line is, by connecting 50 Ω resistors and it is approximated by a 25 Ω for CM and 100 Ω for DM, by using two resistors in parallel or in series. After the circuit of filter is selected, component values are determined. Y- Capacitors are easily determined from the leakage current limit [4], which is given in the safety standards applicable to DUT.

Simple calculations of inductors and capacitors are needed. The is cut-off frequency of common mode filter (900 kHz). and are total common mode inductors and capacitors in EMI filter. Common mode Inductance is presented by [5];

(6.11)

And is presented by . Since are in parallel. dominates , so equation of common mode path is expressed as;

(6.12)

(6.13)

Similarly, for differential mode noise is the cut-off frequency of differential mode filter. and are differential mode inductor and capacitor in EMI filter. In equation (6.14) is represented by [] and is represented by . is the leakage inductance of common mode choke. Final equation of differential mode path is;

(6.14)

(6.15)

Table 6.3 List of component values

Figure 6.9 shown below is a PCB design of EMI filter and it is made using ALTIUM designer software. Figure 6.10 is the hardware developed using different components.

Figure 6.8 PCB Layout of EMI filter

Figure 6.9 Hardware of EMI filter

6.6 Conclusion

This chapter gives description of CM and DM choke, CM and DM filter and EMI filter which is combination of common mode and differential mode filters, other main components of EMI filter such as common mode capacitors (Y capacitors) and differential mode capacitors (X capacitors). In next chapter noise attenuation is tested for respective filters. Difference was obtained between the theoretically calculated and measured value of the filter components.

CHAPTER 7

MEASUREMENT & TEST RESULTS

This chapter presents test and measurement results of the designed EMI filter. Performance of the filter is measured in terms of attenuation of pulsed single shot noise and insertion loss at the designed frequencies of 100 kHz and 900 kHz. A LISN (9 kHz to 30MHz) is used in measurement setup. Based on frequency content of the noise, CM filter was designed with cut-off frequency of 900 kHz whereas DM filter is designed with cut-off frequency of 100 kHz. Scattering parameters (S11, S12, S21 and S22) of the filter are measured with a vector network analyzer. Measurement of S parameters is used to evaluate the filter insertion loss. Magnitude of the insertion loss is further confirmed by measurements with a spectrum analyzer.

7.1 Noise Measurement setup

Schematic of conducted noise measurement setup is shown below in figure 6.1. The measurement setup consists of a LISN which presents fixed 50 Ohms impedance to the flash lamp power supply power mains. These measurements are carried out under actual condition of pulsed operation of the flash lamp power supply. This results into broad band conducted noise. The common mode and differential mode noise signal is measured in time domain with high bandwidth current probes placed around Live (L), Neutral (N) and return Earth (E) lines. In first set of the experiment, measurements are carried out without the EMI filter, whereas in second set, the measurements are carried out with the filter inserted between LISN and the flash lamp power supply.

Figure 7.1 Schematic for noise measurement setup

Figure 7.2 shown below is photograph of the noise measurement setup with EMI filter. It shows a Digital Oscilloscope of bandwidth 2.5 GHz, LISN (9 kHz-30 MHz), flash lamp load and current probes used to measure noise equivalent current on L, N and G conductors.

Figure 7.2 Noise measurement setup with EMI filter

7.1.1 Differential Mode Noise Measurement

Results of the differential mode noise measurement from the power supply in time domain and its Fourier transform are shown in figure 7. 3. Topmost window of the diagram shows time domain measurements of DM noise which is difference of the noise signal on line and neutral conductors whereas the lower window shows the Fourier transform. The noise voltage at 100 kHz is measured to be 8.18 mV.

Figure 7.3 Differential mode noise measurement without filter

The respective time and frequency domain measurement results with filter incorporated in the circuit are shown in figure 7.4. There is significant reduction in the noise amplitude in the bandwidth of interest i.e. DC to 100 kHz due to incorporation of the line filter. The noise amplitude, specifically at 100 kHz is 1.13 mV. The differential mode noise reduction in low frequency regime (up-to 20 kHz) is of the order of 6 db, whereas at 100 kHz which is considered as upper limit of the differential mode contribution the attenuation is of the order of 17 db.

Figure 7.4 Differential mode noise measurement with filter

7.1.2 Common Mode Noise Measurement

Time domain measurement and Fourier transform of the common mode noise spectrum without EMI filter is shown in figure 7. 5. Significant common mode noise is observed in the frequency band 600 kHz to 1 MHz. Based on measurement results the designed cut-off frequency of the common mode filter is set at 900 kHz. At this frequency amplitude of Fourier transform of the averaged measured noise signal is 3 mV. Noise measurement after incorporating EMI filter between the power supply and mains input is shown in figure 7.6. Value of noise amplitude averaged for ten number of measurement readings at 900 KHz with EMI filter is 2.5 mV. This results into attenuation of 1.5 dB. Filter peaking effect in common mode noise measurement is observed at around 300 kHz.

Figure 7.5 Common mode noise without filter

Figure 7.6 Common mode noise with filter

Fourier transformation of the time domain measurement results show an attenuation of 1.5 dB at the design frequency of 900 kHz. Lower attenuation of the measured values as compared to the designed parameters is due to dynamic behavior of parasitic capacitance and inductors under pulsed operating conditions. At the time of flash lamp trigger a sharp high voltage impulse is generated to pre-ionize the flash lamp. Pulsed excitation of the load also results in terms of filter peaking at around 300 kHz.

7.1.3 Conducted Noise Measurement

Earlier sections of this thesis presented the measurement results for common and differential mode components of the conducted emission. This section deals with measurement of composite noise signal due to conducted EMI from the flash lamp trigger circuit as measured on L and N ports of the LISN. The measurement results discussed in this section are not divided into common mode and differential mode components. Results of time domain measurement on live power line (L) without filter is shown in figure 7.7. Bandwidth of lower frequency noise attributed to differential mode current is 100 kHz. At 100 kHz the peak value is 1.5 mV. Higher frequency components of the noise due to common mode current is centered at 900 kHz. Peak value of the noise signal at 900 kHz is 17.5 mV.

Figure 7.7 Line noise without EMI filter

Effect of the EMI filter on conducted noise is shown in figure 7.8. The time domain measurement shows significant reduction in the noise amplitude. Amplitude of Fourier transformed components at 100 and 900 KHz and attenuated by the EMI filter are 1 and 15.5 mV respectively.

Figure 7.8 Line noise with EMI filter

7. 2 Measurement of insertion Loss

Insertion loss is a useful parameter of EMI filter performance. It is defined in terms of power delivered to the load (P1) without the line filter and the power delivered through filter network (P2) inserted between source and the load as,

In this project work the insertion loss is measured by two different techniques. First approach is based on measuring the attenuation for designed frequencies, directly with the help of a spectrum analyzer. In the second technique the insertion loss is estimated by scattering (S) parameter measurements [25]. In direct measurement with a spectrum analyzer, insertion loss of the filter is estimated by analyzing the attenuation effect on continuous sine wave. Figures 7.9 to 7.12 show measurement results of insertion loss at 100 kHz and 900 kHz respectively.

Figure 7.9 Noise spectrum at 100 kHz without filter

Figure 7.10 Noise spectrum at 100 kHz with filter

Figure 7.11 Noise spectrum at 900 kHz without filter

Figure 7.12 Noise spectrum at 900 kHz with filter

The filter is subjected to two different sine wave inputs 100 kHz and 900 kHz corresponding to the designed differential and common mode cut-off frequencies. Peak amplitude of the input signal is maintained at around 500 mV. Sine wave signal of 500 mV, 100 kHz is attenuated to 396 mV. Whereas, the sine wave signals of 500 mV, 900 kHz is attenuated to 74 mV by the filter. This indicates an insertion loss of 2 dB for 100 kHz and 16 dB for 900 kHz. Figure 7.13 shows the measurement setup for S parameters of the filter with a Vector Network Analyzer (VNA). The terms a1 and a2 represent incident waves whereas, b1 and b2 are the reflected waves. The parameters S11, S12, S21, and S22 are measured for calculation of the filter insertion loss.

Figure 7.13 S parameter measurement setup

Input terminal of the device under test (DUT) is connected to Port 1 of the VNA and Port 2 is connected to the output terminals. Figure 7.14 shows photograph of the measurement setup.

Figure 7.14 Test setup for S parameter

VNA output for S11 is shown in figure 7.15. Marker 1 is placed in the region of cut-off frequency for DM filter whereas; marker 2 is placed in the region of cutoff frequency for the common mode filter.

Figure 7.15 VNA plot for S11

Insertion loss of a filter depends on source and load reflection co-efficient and the port S-parameters measured at network ports [26]. In case of measurements with a VNA where the source and load impedances are equal to the network characteristic impedance the S21 parameter represent filter insertion loss. Filter insertion loss as estimated by VNA measurements differs from the actual insertion loss due to the variation in source and load impedances under the actual condition. The S21 measurement plot is shown below in figure 7.16.

Figure 7.16 VNA plot for S21

The S21 parameter represent filter insertion loss. Based on the S-parameter measurements the insertion loss at 100 kHz is around 6 dB whereas, insertion loss at common mode cutoff frequency of 900 kHz is 24 dB.

7.4 Conclusion

This chapter deals with test and measurement results of conducted noise from flash lamp power supply circuit, attenuation, and insertion loss parameters of the designed EMI filter. Measurements of common and differential mode noise are discussed in detail. A single phase LISN (9 kHz to 30MHz) is used in the measurement setup. Designed values of cutoff frequencies i.e. 100 kHz and 900 kHz for common mode and differential mode filters respectively are based on the measurement results. In first set of measurements, insertion loss at specific frequencies of 100 and 900 kHz are estimated by filter response to a single frequency signal generated by a RF signal generator. The filter response is observed in frequency domain with the help of a spectrum analyzer. In second set of experiment, the insertion loss is calculated based on S-parameter measurements with the help of a vector network analyzer.

CHAPTER 8

CONCLUSION & FUTURE WORK

8.1 Conclusion

EMI filters play important role in reliable operation of electronic systems by attenuating the conducted mode noise. The role of EMI filter has become more crucial with the recent trend of lowering the power supply voltage and increasing the clock speed in digital ICs. Electronic equipment’s are required to conform to the EMI standards such as, FCC, CISPR and MIL so that these are not disturbed by external noise sources and neither do they interfere with functioning of other circuits. Line filters are placed between equipment and power lines to limit the emission within threshold limits set by EMI standards. Electromagnetic interference below 30 MHz is considered to be propagated over power supply lines as conducted emissions. The M. Tech. project described in this thesis looks into the design and development aspects of an EMI filter for common and differential mode noise in a pulsed flash lamp power supply. The flash lamp circuit is used to optically pump a solid state Nd: glass laser amplifier. Transient and low repetition rate of the capacitor charging power and trigger circuits entails a time domain measurement approach. Spectral estimation of the noise is carried out post measurement by using Fourier transform of the measured signal. The thesis describes design steps of the filter design, filter characterization by S-parameter measurements and estimation of insertion loss in frequency domain. Highest frequency components observed in the conducted emission of the flash lamp power supply for common and differential modes are 100 and 900 kHz respectively. These frequencies are taken as cutoff frequencies for the filter design. C-L-C pi topology and LC topology are used for differential and common mode filter designs respectively.

Some of the important points addressed in this thesis are,

Common Mode Choke design

Differential Mode Choke design

Common Mode Filter design

Differential Mode Filter design

EMI filter

Noise generation due to common mode current and attenuation by CM filter

Noise generation due to differential mode current and attenuation by DM filter

Characterization by PSPICE simulation

Characterization by S parameter measurements

8.2 Future Work

This thesis has presented the design and testing of an EMI filter for conducted emission in a pulsed power supply for flash lamp. The noise is in the form of transient pulses of short duration. Frequency contents of the noise are estimated by Fourier Transform. Filter design is validated with S parameter measurements and by measuring the insertion loss. The analysis deals with the noise components generation by flash lamp operation. This work can be extended to include characterization of noise generated by other components in the power supply such as SCR’s and relays. Effect of ground wire geometry on noise emission can be studied. Furthermore, there is variation in the insertion loss figure as measured directly with a single frequency and spectrum analyzer and measured under frequency sweep condition of a VNA. This aspect can be looked into by analyzing the circuit impedance dynamics under pulsed excitation. Improvements in power and signal integrity in digital and embedded system circuits due to incorporation of the designed filter can be another extension of this work. Attenuations of 17 dB and 1.5 dB are practically observed for differential mode and common mode noise at 100 kHz and 900 kHz respectively.

APPENDIX

This section consists of description of the important instruments and techniques used in this project work. The discussed instruments are,

Digital oscilloscope

Current probe

Line Impedance Stabilization Network (LISN)

Vector Network Analyzer

Digital Oscilloscope

An oscilloscope is a voltage sensing electronic instrument that is used to visualize voltage waveforms in time domain. Thus it displays variation of a voltage waveform in time on the oscilloscope’s screen [27]. DSO from Keysight (Infiniium model 9104) with 2.5 Ghz bandwidth and 15" XGA display was used in this project. Other key parameters of this four channels digital oscilloscope are [24],

Four analog channels

20 Mpts memory and 10 GS/s maximum sample rate.

Debug and compliance application software including RS232/UART, I2C/SPI, USB and USB2.0, PCIe 1.1 and DDR.

Figure A.1 shows photograph of the digital storage oscilloscope.

Fig A.1 Digital Oscilloscope

Current Probes

A pair of current probes (Tektronix make, model number TCP 312) on live and neutral lines were used for measurement of common and differential mode EMI signals. The current probe is rated for 30 Amp and has bandwidth of 100 MHz [28]. Figure B.1 below shows photograph of the current probe along with the amplifier unit.

Fig. B.1 Current Probe

Line Stabilization Network (LISN)

Line impedance stabilization network (LISN) is used for measurement of line conducted EMI. It provides a fixed and standard 50 μH / 50 Ohm impedance typically in the frequency range 150 kHz to 30 MHz to the DUT power input terminals. It also prevents the electromagnetic interference present on power lines from entering the device and contaminating the measurement data. A 16 Amp, 250 V, single phase LISN model number NSLK 8127 from Schwarzbeck [29] was used in this project. Figure C.1 below shows photograph of the LISN. The LISN offers 50 Ohm impedance in the frequency range 9 kHz to 30 MHz. It has two BNC connectors corresponding to Line and Neutral measurement ports.

Fig. C.1 Line Impedance Stabilization Network

Vector Network Analyzer (VNA)

Vector network analyzer is a multi-port (two or more) microwave receiver used to measure phase and magnitude of the transmitted and reflected waves. It consists of a RF source which can be set to sweep over a specified bandwidth. It also has a processing unit, which displays phase and magnitude of the scattering parameters. In this project work, a two port vector network model S5048 from Copper Mountain Technologies [30] is used for S parameter analysis of the EMI filter. Figure D. 1 shows photo of the VNA used in this work. Main specifications of the VNA are,

Fig. D. 1 Vector Network Analyzer

It has a frequency range of 20 kHz to 4.8 GHz and is used to measure the scattering parameters S11, S12, S21 and S22. The output power can be set from -50 dBm to +5 dBm. S parameters are used to characterize multiport network. A 2-port network is shown in figure D. 2. The S-parameter matrix for the 2-port network is the basic building block for generating higher order matrices for larger networks. Wave Er2, it is made up of the portion of Ei2 reflected from the output port of the network as well as the portion of Ei1 that is transmitted through the network. Each of the other waves are similarly made up of combination of transmitted and reflected waves.

Fig. D. 2. Two-port Network

Relation between the reflected and incident waves is given in form of S-parameter matrix as equation D .1.

(D. 1)

Where,

S11 is input port voltage reflection coefficient

S12 is reverse voltage gain

S21 forward voltage gain

S22 output port voltage reflection coefficient

Expanding above given matrix,

(D. 2a)

(D. 2b)

Thus for measurement of S11 output port is terminated and the ratio of b1 and a1 is calculated. Terminating output port in an impedance equal to the characteristic impedance of the transmission line is equivalent to setting a2 equal to zero, since a travelling wave incident on this load will be totally absorbed. S11 is the input reflection coefficient of the network. Under the same conditions, we can measure S21, the forward transmission through the network. This is the ratio of b2 to a1. This could either be the gain of an amplifier or the attenuation of a passive network. In the case of the EMI filter it represents the insertion loss.

(D. 3a)

(D. 3b)

By terminating the input side of the network, we set a1 equal to zero. S22, the output reflection coefficient, and S12, the reverse transmission coefficient, can then be measured as,

(D. 4a)

(D .4b)

Once a two-port has been characterized with S parameters, direct design of systems may proceed in principle without knowing anything about the internal workings of the two -port.

REFERENCES

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